The present invention is directed to input circuitry, and especially to input circuitry operating to accommodate electrostatic discharge (ESD) conditions.
ESD cells or clamp units are designed to prevent voltage from building up at specific circuit loci, such as terminals. Electrical circuitry used with an ESD cell should limit or prevent electrical leakage at or through the specific terminals during normal operations, yet should support discharge of electrostatic charges from the specific terminals under the control of the ESD cell. It is difficult to ensure that only very little current is permitted to flow (i.e. leak) at or through the specific terminal during normal operating conditions.
There is a need for an apparatus and method for stringently limiting current leakage during normal operations while permitting current flow through a circuit locus, such as a terminal during an ESD condition.